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MITSUBISHI ICS (TV)
PRELIMINARY
Notice:This is not a final specification. Some parametric limits are subject to change.
M64895FP/GP
I2C BUS FREQUENCY SYNTHESIZER FOR TV/VCR
DESCRIPTION
The M64895 is a semiconductor integrated circuit consisting of PLL frequency synthesizer for TV/VCR using I 2C BUS control. It contains the prescaler with operating up to1.3GHz, 4 band drivers and tuning Amplifier for direct tuning. Built-in 4 band drivers.
PIN CONFIGURATION (TOP VIEW)
PRESCALER INPUT GND SUPPLY VOLTAGE 1 SUPPLY VOLTAGE 2
fin GND VCC1 VCC2 BS4
1 2 3 4 5 6 7 8
16 Xin 15 ADS 14 SDA 13 SCL
FEATURES
CRYSTAL OSCILLATOR CHIP ADDRESS INPUT DATAINPUT CLOCK INPUT
M64895FP/GP
* * * * * * * * * *
4 integrated PNP band drivers (Io=40mA,Vsat=0.2V typ@Vcc1 to 13.2V) Built-in high-withstanding voltage tuning Amplifier Low power dissipation (Icc=20mA, Vcc=5V) Built-in prescaler with input amplifier (Fmax=1.3GHz) PLL lock/unlock status display out put (Built-in pull up resistor ) I2C bus control (write mode only) X'tal 4MHz is used to realize 3 type of tuning steps (Division ratio 1/512, 1/640, 1/1024) Programmable chip address Small package (16Pin SOP/SSOP)
BAND SWITCHING OUTPUTS
BS3 BS2 BS1
12 LD/ftest LD/ftest OUTPUT SUPPLY 11 VCC3 VOLTAGE 3 TUNING 10 Vtu OUTPUT 9 Vin FILTER INPUT
Outline 16P2S-A/16P2Z-A
RECOMMENDED OPERATING CONDITION APPLICATION
TV, VCR tuners Supply voltage range..............................................V CC1=4.5 to 5.5V VCC2=VCC1 to 13.2V VCC3=28 to 35V Rated supply voltage...........................................................V CC1=5V VCC2=12V VCC3=33V
BLOCK DIAGRAM
X in 16 ADS 15 SDA 14 SCL 13 LOCK 12 VCC3 11 Vtu 10 Vin 9
OSC 2 DIV
I2C BUS RECIEVER
10 MAIN COUNTER 1/32,1/33 5 SWALLOW COUNTER 4 1/8 P.O RESET BIAS
LOCK DETECTOR
AMP
PHASE DETECTOR
CHARGE PUMP
BAND DRIVER
AMP
1 f in
2 GND
3 VCC1
4 VCC2
5 BS4
6 BS3
7 BS2
8 BS1
1
MITSUBISHI ICS (TV)
PRELIMINARY
Notice:This is not a final specification. Some parametric limits are subject to change.
M64895FP/GP
I2C BUS FREQUENCY SYNTHESIZER FOR TV/VCR
DESCRIPTION OF PIN
Pin No. 1 2 3 4 5 6 7 8 Symbol f in GND VCC1 VCC2 BS4 BS3 BS2 BS1 Pin name Prescaler input GND Power supply voltage 1 Power supply voltage 2 Band switching outputs Function Input for the VCO frequency. Ground to 0V. Power supply voltage terminal. 5.0V0.5V Power supply for band switching, Vcc1 to 13.2V PNP open collector method is used. When the band switching data is "H",the output is ON. When it is "L",the output is OFF. This is the output terminal for the LPF input and charge pump output. When the phase of the programmable divider output (f1/N) is ahead compared to the reference frequency (fREF), the "source" current state becomes active. If it is behind, the "sink" current becomes active. If the phases are the same, the high impedance state becomes active. This supplies the tuning voltage. Power supply voltage for tuning voltage 28 to 35V Lock detector is output. Programmabule freq. Divider output and reference freq. output is selected by the test mode. Data is read into the shift register when the clock signal falls Input for band SW and programmable freq. divider set up. Chip address sets it up with the input condition of terminal. 4.0MHz crystal oscillator is connected.
9
Vin
Filter input (Charge pump output) Tuning output Power supply voltage 3 Lock detectt/ Test port Clock input Data input Address switching input This is connected to the crystal oscillator.
10 11 12 13 14 15 16
Vtu VCC3 LD/ftest SCL SDA ADS Xin
ABSOLUTE MAXIMUM RATINGS (Ta=-20C to +75C, unless otherwise noted)
Symbol VCC1 VCC2 VCC3 VI VO VBSOFF IBSON tBSON Pd Topr Tstg Parameter Super voltage 1 Super voltage 2 Super voltage 3 Input voltage Output voltage Voltage applied when the band output is OFF Band output current ON the time when the band output is ON Power dissipation Operating temperature Storage temperature Conditions Pin3 Pin4 Pin11 Not to exceed VCC1 Pin16 per 1 band output circuit 50mA per 1 band output circuit 3circuits are pn at same time Ta=75C Ratings 6.0 14.4 36.0 6.0 6.0 14.4 50.0 10 470 -20 to +75 -40 to +125 Unit V V V V V V mA sec mW C C
RECOMMENDED OPERATING CONDITIONS (Ta=-20C to +75C, unless otherwise noted)
Symbol VCC1 VCC2 VCC3 fopr1 fopr2 IBDL Parameter Super voltage 1 Super voltage 2 Super voltage 3 Operating frequency (1) Operating frequency (2) Band output current 5 to 8 Conditions Pin3 Pin4 Pin11 Crystal oscillation circuit Normally 1 circuit is on. 2 circuits on at the same time is max. It is prohibited to have 3 or more circuits turned on at the same time. Ratings 4.5 to 5.5 VCC1 to 13.2 28 to 35 4.0 80 to 1300 0 to 40 Unit V V V MHz MHz mA
2
MITSUBISHI ICS (TV)
PRELIMINARY
Notice:This is not a final specification. Some parametric limits are subject to change.
M64895FP/GP
I2C BUS FREQUENCY SYNTHESIZER FOR TV/VCR
ELECTRICAL CHARACTERISTICS (Ta=-20C to +75C, unless otherwise noted, Vcc1=5.0V, Vcc2=12V, Vcc3=33V)
Symbol VIH VIL IIH IIL VOL ILO VBS IOLK1 VtoH VtoL IOH IOL ICPLK ICC1 ICC2A ICC2B ICC2C ICC3 Parameter "H" input voltage "L" input voltage "H" input current "L" input current "L" output voltage Leak current Output voltage Leak current Output voltage "H" Output voltage "L" "H" output current "L" output current Leak current Test pin 13 to 14 13 to 14 13 to 14 13/14 14 14 5 to 8 5 to 8 10 10 9 9 9 3 4 4 4 11 Test conditions Min. 3.0 - - - - - 11.6 - 32.5 - - - - - - - - - Limits Typ. Max. VCC1+0.3 - - 1.5 - 10 -4/-14 -10/-30 - 0.4 - 10 11.8 - - - 0.2 270 70 - 20 - 6.0 46.0 3.0 -10 - 0.4 370 110 50 30 0.3 8.0 48.0 4.0 Unit V V A A A A V A V V A A nA mA mA mA mA mA
Input terminals SDA output Band SW Tuning output Charge pump
VCC1=5.5V, Vi=4.0V VCC1=5.5V, Vi=0.4V VCC1=5.5V, Io=3mA VCC1=5.5V, Vo=5.5V VCC2=12V, Io=-40mA VCC2=12V band SW is OFF Vo=0V VCC3=33V VCC3=33V VCC1=5.0V, Vo=2.5V VCC1=5.0V, Vo=2.5V VCC1=5.0V, Vo=2.5V VCC1=5.5V VCC2=12V VCC2=12V VCC2=12V Io=-40mA VCC3=33V Output ON
Supply current 1 4 circuits: OFF Supply 1 circuits: ON, current 2 Output: OPEN Output current 40mA Supply current 3
The typical values are at VCC1=5.0V VCC2=12V VCC3=33V, Ta=+25C.
SWITCHING CHARACTERISTICS (Ta=-20C to +75C, unless otherwise noted, VCC1=5.0V, VCC2=12V, VCC3=33V)
Symbol fopr Parameter Prescaler operating frequency Test pin 1 Test conditions VCC1=4.5 to 5.5V Vin=Vinmin to Vinmax VCC1=4.5 to 5.5V Vin Operating input voltage 1 80 to 100MHz 100 to 200MHz 200 to 800MHz 800 to 1000MHz 1000 to 1300MHz Min. 80 -24 -27 -30 -27 -18 0 4.7 4 4.7 4 4.7 0 250 - - 4 Limits Typ. - - - - - - - - - - - - - - - - - Max. 1300 4 4 4 4 4 100 - - - - - - - 1000 300 - Unit MHz
dBm
fSCL tBUF tHDSTA tLOW tHIGH tSUSTA tHDDAT tSUDAT tr tf tSUSTO
Clock pulse frequency Bus free time Data hold time SCL low hold time SCL high hold time Set up time Data hold time Data set up time Rise time Fall time Set up time
13 14 13 13 13 13, 14 13, 14 13, 14 13, 14 13, 14 13, 14
VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V VCC1=4.5 to 5.5V
kHz s s s s s s ns ns ns s
3
MITSUBISHI ICS (TV)
PRELIMINARY
Notice:This is not a final specification. Some parametric limits are subject to change.
M64895FP/GP
I2C BUS FREQUENCY SYNTHESIZER FOR TV/VCR
The information of 5 bytes necessary for circuit operation is chip address and control data, bandS.W. data of 2 bytes and divider byte of 2 bytes. After the chip address input, 2 or data of 4 bytes are received. STO STO D1 CB D2 BB STO STO Function bit is contained the first and the third data byte to distinguish between divider data and control data, band data, and "0" goes ahead of divider data, and "1" goes ahead of control data, bandS.W. data.
METHOD OF SETTING DATA
The input information to consit of 2 or data of 4bytes to lead to Chip Address is received in I Cbus receiver. It shows a definition of bus protocol admitted in the following. 1_STA CA 2_STA CA 3_STA CA 4_STA CA CB D1 CB D1 BB D2 BB D2
2
STA : Start condition STO : Stop condition CA CB BB D1 D2 : Chip address : Control data byte : BandS.W. data byte : Divider data byte : Divider data byte
SDA
SCL S STA
1-7 ADDRESS CA
8 0
9 ACK
1-7 DATA
8
9 ACK
1-7 DATA
8
9 ACK P STO
Write mode format Byte Address Byte Devider Byte1 Devider Byte2 Control Byte1 Band SW Byte MSB 1 0 N7 1 X LSB A A A A A
1 N14 N6 CP X
0 N13 N5 T2 X
0 N12 N4 T1 X
0 N11 N3 T0 BS4
MA1 N10 N2 RSa BS3
MA0 N9 N1 RSb BS2
0 N8 N0 OS BS1
4
MITSUBISHI ICS (TV)
PRELIMINARY
Notice:This is not a final specification. Some parametric limits are subject to change.
M64895FP/GP
I2C BUS FREQUENCY SYNTHESIZER FOR TV/VCR
TEST MODE DATA SET UP METHOD
Test Mode Bit Set Up X : Random, 0 or 1. normal "0"
T2,T1,T0 : Setting up for the test mode T2 T1 T0 00X 01X 110 111 100 101 Charge pump
Normal operation
MA1 ,MA0 : Programmabule Address Bit Address input voltage 0 to 0.1VCC1 Always valid 0.4VCC1 to 0.6*VCC1 0.9VCC1 to VCC1 MA1 0 0 1 1 MA0 0 1 0 1
High impedance Sink Source High impedance High impedance
Pin 12 condition Lock output Lock output Lock output Lock output fREF output f1/N output
Mode
Normal operation
Test mode Test mode Test mode Test mode Test mode
RSa, RSb : Set up for the reference frequency division ratio RSa 1 0 X RSb 1 1 0 Division ratio 1/512 1/1024 1/640
N14 to N0 : How to set dividing ratio of the programable the divider Dividing ratio=N14(214=16384)+ +N0(20=1) Therefore, the range of division N is 1,024 to 32,768 Example) fvco=fREFx8xN =3.90625x8xN =31.25xN (kHz) CP: Setting up the charge pump current of the phase comparator CP 0 1 Charge pump current 70A 270A Mode Test Normal
OS : Set up the tuning amplifier OS 0 1 Tuning voltage output ON OFF Mode Normal Test
Power on reset operation (Initial state the power is turned ON) BS4 to BS1 Charge pump Tuning amplifier Charge pump current Lock detector : OFF : High impedance : OFF : 270A : High
Frequency division ratio : 1/1024
TIMING DIAGRAM
START condition
SDA tBUF tLOW tr tf tHDSTA
SCL
tHDSTA
STOP condition
tHDDAT
tHIGH
tSUDAT
tSUSTA
START condition
tSUSTO
STOP condition
CRYSTAL OSCILLATOR CONNECTION DIAGRAM 16
18pF Crystal oscillator characteristics Actual resistance : less then 300 Load capacitance : 20pF
4MHz
5
MITSUBISHI ICS (TV)
PRELIMINARY
Notice:This is not a final specification. Some parametric limits are subject to change.
M64895FP/GP
I2C BUS FREQUENCY SYNTHESIZER FOR TV/VCR
APPLICATION EXAMPLE
BUILT-IN PLL TUNER +5V Vcc1 to 12V UHF VHF
1nF
-
10F
3 Vcc1
15
ADS
Vcc2 4 BS4 5 BS3 6 BS2 7 BS1 8 1000pF
+B
BS4
BS3 IF BS2
IF
BS1
4-BAND TUNER
SDA 1nF 14
M64895
fin 1
Lo
MCU
1nF
13
SCL 0.1F Vin 9 LOCK Vtu 10
1.5nF
AGC
AGC
VT
56k
56k 2.2nF 100pF
AFT
12
Xin 16
GND 2
Vcc3 11
18pF 4MHz
+33V BT
Note) Filter constant is for reference. Add a capacitor to stabilize the filter circuit.
Units Resistance : Capacitance : F
6

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